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    2020 Engineering Internship – CPU Verification - 6 months

    • 16768
    • Hardware Engineering
    • Interns/Students
    • Central Engineering - CPU
    • Central Engineering - CPU Engineering
    • France
    • Sophia Antipolis

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    We are an Equal Opportunity Employer and do not discriminate against any employee or applicant for employment because of race, color, sex, age, national origin, religion, sexual orientation, gender identity, status as a veteran, and basis of disability or any other federal, state or local protected class.

    Job Description

    INTRODUCTION

    Do you want to help Arm and its partners to build outstanding products? 

    Arm Sophia Antipolis design centre is located in one of the most appealing parts of France, at the heart of Europe’s largest and most dynamic technology park. Surrounded by mountains and the Mediterranean Sea, this outstanding design centre has delivered leading products from Arm’s Cortex (TM) processor family. These CPUs power some of the world’s best-seling smartphones, tablets and gaming systems, using technology that has taken user experience and performance to another level. 

    Now, you have an opportunity to take part in the development of the next generation of processors that will appear in the most desirable products over the next 3 years. The local design team is a good combination of very expert engineers and some of the most enthusiastic and hardworking graduates, coming from the best engineering schools. Collectively, the team is highly creative, collaborative, delivery orientated and committed. 

    You will be able to work closely with our hardworking and experienced engineers to help design ground-breaking technology. You will gain knowledge and tackle challenges while being able to encounter opportunities to work on all aspects of product development. 

    We want to make sure that every intern learns about different aspects of our work and grows their knowledge, that is why you will work in a team on real projects from day one, with guidance from expert engineers, and also have dedicated time for personal development. 

    JOB PURPOSE 

    You will be part of the CPU verification team and verify IP to the highest quality standards using a wide range of methodologies from constrained random simulation to real applications on emulation or FPGA platforms. Innovative formal methods are also at the heart of Arm verification methodology. 

    You will develop scripts, tools, models and test benches using various programming languages such as System Verilog, C, C++ and Python. 

    Several subjects are available and described below. Choose the one(s) you prefer and indicate them in your application. Only one student will work on a given subject, followed by a dedicated experienced engineer. 

    [REF 2020-V-1] QUALITY CHECK AUTOMATION OF A HIGHLY CONFIGURABLE TEST GENERATOR

    Modern CPU features and performance lead to growing verification complexity. Stimulus generators are getting bigger and bigger to properly stress all the design functionalities. How can we guarantee the quality of these stimuli?

    The goal of this internship is to ensure that test generation works as expected by monitoring smart statistics collected during test runs.

    You will first develop a software infrastructure as efficient as possible to collect and visualize test metrics. A database will then be setup to monitor and automatically assess the quality of a huge set of tests. Data analysis techniques such as machine learning will be investigated to correlate test outputs to inputs.

     [REF 2020-V-2] VERIFY MEMORY SYSTEMS USING INNOVATIVE FORMAL METHODS

    How can we use innovative formal methods to verify data hazard in a modern application CPU memory system?

    Modern application CPUs implement complex and optimized memory systems to push performance forward. To that end, data hazard is one of the micro-architecture key element to guarantee the correctness and such a level of performance.

    The goal of this internship is to use formal verification methods to verify memory coherency issues caused by data hazard in a memory system.

      

    [REF 2020-V-3] WAVEFORM EXTRACTION ON FPGA USING INNOVATIVE ARM TOOLS

    FPGA are now extensively used at Arm for bug hunting in our CPUs but debugging an FPGA can be frustrating because of a lack of adequate internal visibility.

    Arm already provides an FPGA debug solution able to extract CPU execution trace and monitor SVA.  The goal of this internship is to go further and develop a highly efficient signal capture infrastructure for waveform extraction on FPGA.

     You will start with a simple design in simulation. Then, you will investigate solutions to go further and increase the number of signals to be captured and the number of samples to be recorded considering techniques such as compression. Trials will be done on FPGA with real CPUs. 

    [REF 2020-V-4] IMPROVE PPA (POWER-PERFORMANCE-AREA) IN CPUs USING FORMAL TECHNIQUES

    Arm CPUs are highly optimized thanks to designers’ expertise and synthesis tools. However, these designs also grow in size and complexity, making these optimizations more and more difficult. 

    The goal of this internship is to identify and implement new techniques based on formal methods that will either help with optimization or even automatically perform optimizations for PPAs

     You will learn about formal verification capabilities and main design techniques used for PPA. You will investigate known blockers to achieve better PPAs.

    You will then select some of these blockers and provide solutions using formal techniques. You will apply these techniques to real CPU designs and provide a comparison of the PPAs before and after optimization.

    [REF 2020-V-5] EXPLORE C-RTL CO-VERIFICATION USING FORMAL TECHNIQUES

    CPUs are developed at Register Transfer Level (RTL) in dedicated hardware languages. However, for a modern CPU, a lot of code around the RTL is written in higher-level languages like C for simulation testbenches, models, etc.

     Even though formal verification is mainly focused on RTL verification, there are tools that allow us to formally verify C and RTL programs together.

     The goal of the internship is to study the most useful use cases and evaluate tool performances on real CPU features such as branch prediction or floating-point computation. 

    [REF 2020-V-6] ADAPT VERIFICATION TECHNIQUES USED ON CORTEX-A PROCESSORS TO A CORTEX-M

    Growing M-class CPU performance drastically increases logic complexity. Bugs are more and more triggered by a combination of complex instruction sequences and timings.

     The goal of this internship is to evaluate, integrate and extend the verification methodology used on high-end application CPUs to Cortex-M CPUs.

     You will get familiar with the Arm architecture and the CPU micro architecture to identify sensitive areas. You will then generate software to push an existing Cortex-M CPU to the limit. You will finally compare the results with the current test infrastructure.

    Job Requirements

    JOB REQUIREMENTS 

    We are looking for students in their last year of Masters (BAC+5 or equivalent) and available for a 5-month or 6-month internship. 

    We are looking for students in electronic engineering, computer engineering, computer science, or another relevant field, but other degrees may also be considered based on your experience. 

    We are looking for students who have the following skills or experience:

    • An engineering mind-set with strong problem-solving skills.
    • A keen interest in CPUs and digital systems.
    • An understanding of computer architecture fundamentals.
    • Familiarity with basic digital design concepts.
    • Experience with at least one programming language.
    • Excellent attention to detail.
    • Creativity and ability to communicate ideas effectively.
    • Good interpersonal and collaboration skills.

    OTHER DESIRABLE SKILLS INCLUDE:

    • Knowledge of one of the main CPU architectures.
    • Knowledge of design techniques for low-power.
    • Familiarity with a hardware description language, such as VHDL or Verilog/SystemVerilog.
    • Exposure to verification techniques and testbenches (such as UVM, coverage, or Formal).
    • Programming languages such as: assembly language (ideally Arm assembler), higher-level (for example C), object-oriented (for example C++), or scripting (for example Python).
    • Use of a Linux environment and shell programming/scripting with for example bash, git, or make.
    • Exposure to low-level programming or driver development.

     Package

    Salary – 1750 euros / month

    Lunch vouchers

    1 day off (authorized leave) / month

     

    Internship duration

    5 to 6 months.

     

    ARM Benefits

    Benefits

    Your particular benefits package will depend on position and type of employment and may be subject to change. Your package will be confirmed on offer of employment. Arm’s benefits program provides permanent employees with the opportunity to stay innovative and healthy, ensure the wellness of their families, and create a positive working environment.

    • Annual Bonus Plan
    • Discretionary Cash Award
    • Supplementary pension
    • Private Medical Insurance (employee & family)
    • Life Insurance
    • Holiday, 25 days annual leave
    • Sabbatical, 20 paid business days every four-years of service
    • Volunteering, One (1) paid working day each year (TeamARM)
    • Others, free car parking, luncheon vouchers & Public Transport Pass reduction, team and social events

    About Arm

    Arm® technology is at the heart of a computing and connectivity revolution that is transforming the way people live and businesses operate. From the unmissable to the invisible; our advanced, energy-efficient processor designs are enabling the intelligence in 86 billion silicon chips and securely powering products from the sensor to the smartphone to the supercomputer. With more than 1,000 technology partners including the world’s most famous business and consumer brands, we are driving Arm innovation into all areas compute is happening inside the chip, the network and the cloud.

    With offices around the world, Arm is a diverse community of dedicated, innovative and highly talented professionals. By enabling an inclusive, meritocratic and open workplace where all our people can grow and succeed, we encourage our people to share their unique contributions to Arm's success in the global marketplace.

    About the office

    The staff at the Arm Sophia Antipolis design center is mostly focused on CPU design. Sophia Antipolis is a technology park that’s surrounded by a large national park, with wild boar that live within the city and can be seen strolling through the tech park. It’s conveniently located a quick 30 minute drive southwest of Nice, 45 minutes to Monaco, and only 20 minutes to Cannes.

    Sophia Antipolis, France
    Arm France SAS
    25 Allée Pierre Ziller
    Le Paros
    BP 70124
    F-06903 Sophia Antipolis Cedex



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