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Do you want to help Arm and its partners to build outstanding products?
We are looking for enthusiastic interns interested in a career in digital design. As we are shifting in a new era of total compute, at Arm you will be offered the excitements of shaping the Fifth Wave of Computing that will be fundamental in making the world we live in more efficient and more sustainable.
Arm’s Sophia Antipolis design centre is located in one of the most appealing parts of France, the French Riviera, at the heart of Europe’s largest and most dynamic technology park. Surrounded by mountains and the Mediterranean Sea, this outstanding design centre has delivered leading products from Arm’s Cortex (TM) CPU family, such as recently Cortex-M23 and Cortex-A75. These CPUs power some of the world’s best-selling smartphones, tablets and gaming systems, using technology that has taken user experience and performance to another level.
Join our success! We look forward to receiving your application!
The aim of our internships is to develop your potential by taking part in the development of the next generation of CPUs that will appear in the most desirable products over the next 3 years and give you an incredible variety of potential career paths. The Local design team is a good combination of very expert engineers and some of the most enthusiastic and hardworking graduates, coming from the best engineering schools. Collectively, the team is highly creative, collaborative, delivery orientated and committed. We will support you with continuous learning and development, you will be encouraged to achieve your professional goals.
A wide variety of internship topics is offered in microarchitecture and design for which you will have to show and grow strong development capabilities in CPU microarchitecture knowledge and C/C++ and HDL languages. Design internships include:
- [2020-D-1] Power Efficient Branch Prediction
- [2020-D-2] Next Generation Instruction Queues
- [2020-D-3] Performance-Aggressive Pointer Authentication
- [2020-D-4] Power Saving Technique for Memory Intensive Workloads
- [2020-D-5] Faster Data Accesses
- [2020-D-6] Finding Best Performance-Area Tradeoff for Cortex-M Baseline
When you apply, please specify your subject preference.