Job Description

Background

The Media Processing Division (MPD) in ARM has the mission to be at the forefront of advanced multimedia IP products. The Mali range of Graphics Processors and Video Engines deliver an advanced architecture for hardware acceleration of graphics and video, tuned for low energy consumption and high performance.

Due to our considerable success to date and continuing strong customer interest we seeking to strengthen the Division’s engineering team and are therefore recruiting for a Principal Hardware Verification Engineer to be a key technical contributor within this expanding team.

Role Requirements

Implementation and verification of high performance, low power GPUs to drive an ever increasing range of embedded devices is a vast and exciting challenge. At ARM, verification is a significant and rewarding part of the IP development process, and for each GPU development the verification activity is planned and executed by a dedicated team of experts who are involved in all stages of the project from architecture and methodology definition, to design sign-off.

We are currently seeking a highly motivated principal verification engineer to join this growing team based in Cambridge. As ARM utilises a wide range of verification techniques including simulation, prototyping, modelling and formal proofs the successful candidate will be required demonstrate specialist skills in complex IP verification, including hands-on experience using state of the art verification tools, techniques and methodologies to achieve successful outcomes.

In addition due to the tightly coupled nature of the GPU hardware and software the successful candidate will need to have an appreciation of the operation of each in the system, as well the ability to understand the ‘big picture’ view of how each unit interacts in the overall design.

Job Requirements

Qualifications

Good university degree, ideally in electronic engineering or computer science, although other science graduates will be considered if they have relevant experience.

Essential Attributes

• Extensive experience of architecting and implementing verification testbenches for complex designs at unit or multi-unit level.
• Proven track record of technically owning and executing the verification process from test plan creation to verification sign-off.
• Experience of applying constrained random, coverage driven, and assertion-based verification techniques.
• Expert knowledge of one or more high level verification languages such as SystemVerilog, Specman, Vera, or SystemC.
• Ability to quickly understand and apply complex specification detail.
• Willingness to tackle varied and complex technical challenges.
• Knowledge and enthusiasm to drive adoption of new techniques and methodologies.
• Strong communication skills and ability to work well as part of a team.

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