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Job Details
Formal Verification Engineer
Job ID #: 2670
Country: USA Location: Austin (TX)
Job Category: Hardware Engineering Employment Type: Experienced Professionals
Division: Processors Division Department: Processor Division - Engineering
Hours of work (per week):



Job Purpose
In this role, you will be responsible for the formal verification of the next-generation ARM microprocessor and coherent interconnect.

This is an outstanding opportunity to be part of the ARM Austin Design Center. You will be part of a small and talented team, giving you the opportunity to innovate and make a significant contribution. We employ leading-edge verification technologies and methodologies to ensure the highest quality in our products.

Responsibilities


  • Work closely with the design team to develop a comprehensive formal verification plan
  • Prove properties of the design, find design bugs, work closely with design teams to help improve the microarchitecture
  • Architect novel and innovative solutions for verifying complex design microarchitectures
  • Conduct test plan, formal verification reviews, and coverage hole analysis with design and verification teams
  • Work closely with the design team to review and enhance hardware specifications
  • Improve formal verification methodology



Experience
The candidate should have 3+ years experience in formal verification or functional design verification of complex designs.  It is a plus if the candidate has focused experience verifying multiprocessing out-of-order microarchitectures.

Technical Requirements
Applicants should have experience in most of the following areas:


  • Knowledge of CPU design architectures, VLSI circuits, and digital logic design
  • Experience in formal verification and analysis of pipelined microarchitectures and coherent memory systems
  • Good understanding of abstraction techniques and formal verification techniques
  • Knowledge and experience in reviewing and interpreting hardware specifications
  • Experience with HDL’s such as Verilog, SystemVerilog and temporal logic assertion languages such as SVA
  • Hands-on experience using EDA formal verification tools
  • Proficiency in programming/scripting languages with excellent debugging skills
  • Knowledge of constrained random verification methods is a plus
  • Must be a team player with excellent communication skills and interact closely with design teams


General Attributes
It is essential for the successful applicant to:

  • Work well in a team environment
  • Have excellent written and verbal communication skills
  • Be motivated to continuously develop skills and accept a variety of responsibilities as part of contributing to the design center’s success


Education
BS or MS degree in Electrical Engineering, Computer Engineering, or Computer Science.

Package
ARM will offer the following benefits for this position:
  • Salary - Commensurate with experience
  • Equity
  • Annual bonus plan
  • Medical Insurance
  • Dental Insurance
  • Vision Insurance
  • Life Insurance
  • Contributory 401(k)
  • Stock Purchase Plan
  • Four weeks paid vacation

  • Four week sabbatical after four years



ARM is an Equal Opportunity Employer.

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