Job Description

Job Purpose
In this role, the candidate will be part of a small team responsible for the verification of an enterprise DRAM (DDR) memory controller IP design.

This is an outstanding opportunity to be part of the ARM Austin Design Center. Our main focus is designing high-performance processor, interconnect, and system IP.  You will be part of a small and talented team, giving you the opportunity to innovate and make a significant contribution. We employ leading-edge technologies and methodologies to ensure the highest quality in our products.

Responsibilities

• Work closely with the design team to develop verification plans.
  
• Develop SystemVerilog testbenches for block-level and top-level functional verification of the DRAM controller.
  
• Document testplans and testbench design.
  
• Generate and run testcases on logic simulation models.
  
• Debug and correct functional errors in the HDL/logic model, using simulation tools, debug tools, and programming skills, based on in-depth understanding of the architecture and RTL design of the IP.
  
• Define and implement functional coverage, enhance testbench to ensure coverage closure.
  

Job Requirements

Experience
The candidate should have 3+ years experience in system IP, microprocessor, or SoC validation, including experience in developing advanced object-oriented transaction-based testbenches.

Technical Requirements
Applicants should have experience in most of the following areas:

• CPU microarchitecture including knowledge of areas such as out-of-order execution, register renaming, reservation stations, processor pipelines, etc.
  
• Multiprocessing microarchitecture including knowledge of cache coherence, bus and high-speed interface protocols, etc.
  
• DRAM memory controller microarchitecture, including DDR protocols is desirable
  
• Verilog HDL language and associated software simulators
  
• Assembly language for ARM or other architectures
  
• Basic understanding of logic design and state machines
  
• Good software engineering skills including understanding of object-oriented programming, data structures, and algorithms
  
• Specification and creation of design testbenches
  
• Functional coverage driven verification methods
  

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